In the solid state integrated circuit design field, most circuits require an on-chip voltage/current reference in order to properly operate the circuits. One common source of stable and accurate on-chip reference is the band-gap reference circuit. Circuit designers generate different level of voltage references based on the band-gap reference to correctly bias circuits. It is essential to test and characterize a design on a fabricated silicon chip to ensure that the design is correct, and it can meet the requirement of specification. Unfortunately, a large physical layout area is needed to provide a wide range of fine-step references. To reduce the layout area, designers often choose the best-guess range of rough-step references. However, the consequence is that the capability of design characterization is limited, and the accuracy of characterization is greatly compromised.
For example, complementary metal-oxide-semiconductor (“CMOS”) image sensors contain a photon sensing pixel array, readout and calibration circuits. Verifying and recording performance of sensor pixels and circuits is often called characterization of the CMOS image sensor. It is important to characterize the CMOS image sensor in details, since many important sensor parameters are highly relative to the fabrication technology and process variation. If designers choose the best-guess range of rough-step references, their capability in characterizing the CMOS image sensor is limited, due to the unsatisfactory accuracy of the characterization.
When design defects are identified (or process condition is shifted), the designer needs to modify the design and re-tape out fabrication masks to fix the defects. This is also known as ECO (engineer change order). ECO changes may cost a lot of money and a great amount of the project leap time.
On the other hand, fabrication area and power consumption are two major concerns in the solid state integrated circuit design. As electronic devices become smaller and more light-weighted, it is desirable to provide a wide range of fine-step reference source with a small physical layout area.
Advantageously, the present invention provides a solid state integrated circuit that exhibits merits such as improved accuracy of characterization, less fabrication area, and reduced power consumption, among others. The approaches described in this section are approaches that could be pursued, but not necessarily approaches that have been previously conceived or pursued. Therefore, unless otherwise indicated, it should not be assumed that any of the approaches described in this section qualify as prior art merely by virtue of their inclusion in this section.